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MIT develops electronic stacking technology: the number of chip transistors has increased significantly, and AI hardware performance is comparable to that of supercomputers
The MIT team introduced an innovative electronic stacking technology in the latest issue of Nature magazine, which opens up new paths for the development of artificial intelligence hardware by vertically expanding transistor density.
Technological breakthrough: Vertical revolution of multilayer chips
Core Method: The team successfully manufactured multi-layer chips, breaking through the limitations of traditional planar layout by alternating the growth of high-quality semiconductor material layers and directly stacking them.
Technical comparison:
Traditional chips rely on reducing transistor size to improve performance, which is close to the physical limit;
New technologies are turning to "three-dimensional construction" to achieve exponential density growth by stacking transistors and semiconductor components.
Traditional limitations: the "bungalow dilemma" of silicon substrates
The root cause of the problem: As a growth platform, traditional silicon wafers need to be attached with thick silicon "floor" per layer, resulting in:
Design flexibility is limited, making it difficult to achieve heterostructure integration;
Inter-layer communication is inefficient and signal transmission delay is significant.
Innovation Solution: Substrate-free Design and Low-Temperature Process
Key Improvements:
Abandon silicon substrates: allows the direct construction of high-performance components (such as transistors, memory, logic circuits) on any crystal surface;
Low temperature operation: protect the underlying circuit from heat damage and improve manufacturing yield;
Direct contact between layers: eliminates obstacles to thick silicon layers, and significantly improves communication speed and quality.
Application Prospects: Computing Revolution from Notebooks to Data Centers
Consumer Electronics: Laptops and wearable devices will be equipped with AI hardware, with performance comparable to supercomputers;
Data center: Single-device storage and computing power match physical data centers, promoting the popularization of distributed computing architecture;
Industry impact: The semiconductor industry breaks through material and technical limitations and provides a new extended dimension for AI, logical computing and memory applications.
Technical milestone: Reshaping information processing paradigm
Performance leap:
The transistor density has increased exponentially, and the computing power per unit area has increased significantly;
Optimize the energy efficiency ratio and reduce high-performance computing energy consumption.
Strategic significance:
Promote the miniaturization and popularization of AI hardware, so that supercomputing capabilities can be within reach;
We will usher in the era of "democratic computing resources" and empower cutting-edge fields such as autonomous driving and medical diagnosis.
Source: Science and Technology Daily (Reporter Zhang Mengran)
Technical highlights marked:
Vertical stacking: breaking through the limits of plane physics, and the transistor density increases exponentially
Subscription-free design: any crystal surface construction component, design flexibility is improved
Low temperature process: protecting the underlying circuit, optimizing manufacturing yield and reliability
Direct connection between layers: communication speed is improved, signal delay is reduced
Application scenarios: consumer electronics AI, data center decentralization
Traditional structure: silicon wafer substrate + heavy silicon layer + planar transistor
MIT Innovation: Direct Stacking of Multilayer Semiconductors + Inter-layer High-speed Communication Channel
Performance comparison: With the same volume, the number of transistors is increased by 10 times +, and the computing power is comparable to that of a supercomputer
